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Computer Architecture & Organization

Computer  Architecture  &  Organization :- Important questions






1(i)Write down the structural and behavioral aspects of half adder and full adder.
(ii) Realize half adder and full adder using logic gates.
2.List various register level component.
3.What do you understand by design levels in the design of computer systems.
 4.Write down the HDL and VHDL of half adder and full adder.
5.llustrate the use of state table for a sequential circuit considering one input variable x, one output variable y and two clocked D Flip flop also use, AND gate, OR gate, and Inverter.
6.Write down the component of Processor level.
7.Diagramatically state the Queuing Model. Write all its derivation/  formulas. Illustrate this model with a suitable examples.  
8.Define performance measurement along with it  formulas. Design a computer with multiple CPU and Main memory banks.
9.Represent Diagrammatically the internal organization of CPU and Cache memory.
10. What do you mean by programmable logic devices? Represent with diagram .
11.Consider a 5X32 decoder with four 3X8 decoder and a 2X4 decoder.Use a block diagram representation.
12.Represent the iterative flow method used by a CAD with a flowchart representation and discuss the usage of CAD tools.
13. Design RS Flip Flop using NOR and NAND Gate and analyze its various cases.
 14.With the help of logic circuit and logic diagram classify the shift registers based on the direction of data movement and mode of input and output.
  15. Design and explain about word gates with the help of NAND and NOR gate
16. Write down the basic arthematic operations of ALU along with their different  implementations. Design the logic diagram of arthematic circuit.
  17. What is the basic structure of floating point numbers?  Consider  an example to represent it
.
18.Write short notes on
(i) Multiplexers
(ii) Word Gates
(iii) Encoders and decoders
19.Design  the followings:
(i) a  4-bit D register with parallel loads.
(ii) a register-level design of  4-bit magnitude comparator
(iii) a 4-bit parallel adder.
20. Design an eight-input multiplexer  constructed from two-input multiplexers.
.

1 comment:

  1. madar chodo coa ka paper h ye ki dld ka...bhosadi ke pehle khud padh ke aao.....

    ReplyDelete

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